Feasibility of Integrating Memristors and Threshold Logic for Compact Low Power Digital Circuits
PI: Hugh Barnaby
This is a proposal to integrate two new approaches, both of which are compatible with existing CMOS technology and design methodologies. One is the new technology of resistive memory or memristor (ReM), and the other is a novel digital circuit architecture that realizes threshold logic. ReM is an enabling technology for 3D integration since the devices are built in metal layers, which enables “switches” to be fabricated in back-end-of-line (BEOL) processes. This can potentially achieve significant reduction in area. Furthermore, in many logic architectures, ReM devices may be used in lieu of MOSFETs for many functions. ReM technologies, which are generally compatible with CMOS, when employed in conjunction with circuit architectures (e.g. threshold logic) offer a potential solution to the future requirements of high density, low power digital circuits.